imec Fuses Compound Chips onto Silicon, Cracking 325GHz for AI Data Centers

To make data move faster inside AI data centers, silicon alone isn't enough — Belgian research institute imec wants to weld two materials together.

Three key facts

On June 11, imec announced system-level integration of III-V chiplets with silicon CMOS on a 300mm silicon interposer. III-V materials — indium phosphide, gallium arsenide, gallium nitride — are far better than silicon at handling high-frequency signals; the hard part has always been marrying them to mature silicon processes. imec pulled it off with laser-assisted bonding.

A few numbers show this isn't a lab toy. A new MIM capacitor architecture pushes capacitance density 10-to-100x higher than typical on-chip capacitors in III-V technologies; alignment accuracy across 43 devices came in below 600nm, with rotational misalignment under 0.05 degrees. That kind of consistency is the prerequisite for going from "we made one" to "we can mass-produce a batch."

RF performance was pushed to 325GHz. Insertion loss stays record-low out to 325GHz, with RF reflection below −15dB across the 110-170GHz band. imec's Xiao Sun said the platform brings performance, scalability, and manufacturability together — aimed squarely at mmWave and sub-THz wireless plus ultrafast data-center interconnects.

WangDou's Take

There's not a single company you know in this story — no stock price, no valuation — yet every AI app you use daily is ultimately won or lost at places like this. Everyone counts GPUs; almost nobody asks whether the data moving from one chip to the next is fast. This is the unglamorous, unheadlined grunt work imec does: aligning two materials with completely different temperaments to within 600 nanometers, and doing it reproducibly 43 times over. The day some vendor's keynote brags "latency dropped again," the crowd claps — but the thing that actually dropped it was a paper like this one, posted years earlier, that nobody reshared. The spectacle belongs to the keynote. The foundation belongs to the lab.

Source: imec — imec unlocks system-level III-V chiplet integration on Si-CMOS · eeNews Europe — Imec advances III-V chiplet integration with RF silicon interposer